As communication devices expand into software definable and cognitive arenas, the design efforts in multiband and multimode transceiver technology have had to rise to the challenges of enabling improved inter-connectivity and spectrum utilization. For example, the design of multiband and multimode synthesizers presents several challenges in the generation of signals and the control and suppression of noise upon those signals.
Many clocks used by today's digital circuits use square waves with short rise and fall times. Unfortunately, the noise generated by such clock signals can have adverse affects on circuits. Signal synthesis for transceiver architectures has focused on image rejection for direct conversion receivers and quadrature direct modulators for transmitters in order to minimize such noise. However, both of these functions require the use of a very broadband differential quadrature signal set with continuous frequency operation from 100 MHz up to 6 GHz.
In addition to the many signal quality specifications, there are three separate design parameters typically addressed in the design of an all-band signal source for wireless communication equipment. The first design parameter is a balanced or differential quadrature signal generator for a direct conversion receiver and a direct launch transmitter. The second parameter is a two state 50% duty cycle driver signal for switching mixer implementation. The third parameter is a low discrete part count, which is typically implemented by reducing the frequency range of the input signal source relative to the output frequency range.
A primary approach to transceiver synthesis for mobile battery operated communications equipment uses single band operation with a divide-by-four divider to achieve an accurate 50% duty cycle differential quadrature signal set. However, this approach requires a reference signal source operating at a frequency four times that of the intended output frequency in addition to power draining low noise dividers.
An alternative approach to transceiver synthesis uses a divide-by-two divider in which both the rising and falling edge of the reference signal define a quadrature signal set. Quadrature accuracy is defined by the duty cycle of the times two input frequency signal, assuming equal latency associated with the rise and fall signal processing. The trade-off, however, is a reduction in the input reference frequency by a factor of two for a duty cycle compensation network.
A third quadrature signal generation approach utilizes a poly phase network of resistor capacitors or inductor capacitors. This third approach is considered a frequency domain approach with the input frequency being equal to the output frequency. However, a poly phase network does not provide suitable quadrature generation for a two state time domain square wave signal used as a switching mixer driver.
Accordingly, it would be beneficial to have an improved means of processing modulated input signals for quadrature signal generation of transmitter and/or receiver operation of communication equipment, particularly battery operated communication equipment in the form of hand-held and mobile radios.